CPU Design Engineer - Cache

Miro-architecture design for CPU IP products , writing detailed design specification for RTL implementation Writing detailed assertions in the design for formal verification Working closely with verification team to fix bugs found by regression Working closely with modelling team to make sure design performance can be met Running synthesis and optimizing design target of power/timing/area Writing in-depth functional coverage and assertions, driving IP product verification convergence and product signoff Working under pressure to deliver IP to customer, track project status and resolve design critical issues Skills and Experience: Degrees from EE. CS or relevant speciality majored in integrated circuit design 4 to 6 years experience in micro-architecture and RTL design In-depth understanding of ARM/RISC CPU architecture Deep understanding of modern computer architecture such as CPU/ GPU/DSP/NPU, cache coherency, memory consistency, and modern bus protocol such as AXI/ACE/CHI CPU memory subsystem design experience is a pluses Deep understanding of design for low power, design for verification and design for reusage Thorough knowledge of Verilog/System Verilog Formal verification experience is a plus On-track product delivery records and experiencing in design from specification, implementation to final signoff Proficiency in writing functional coverage and assertion Excellent communication skill, teamwork and positive attitude