AI DSL Compiler Engineer

Developing and optimizing AI compiler stack for AI Processor. Developing compiler infrastructure and optimization based on MLIR. Supporting and optimizing AI kernel programming models and DSLs. Optimizing kernel compilation, scheduling, code generation and runtime performance. Working closely with hardware and algorithm teams to improve AI workload performance. Skills & Experience Strong programming ability in C++ and Python. Experience in AI compiler development and performance optimization. Hands-on experience with MLIR; experience with Linalg or related MLIR dialects is a plus. Experience with AI kernel DSL/compiler frameworks such as Triton, TileLang, TVM/TIRx, cuTile or PTO is a strong plus. Experience in kernel optimization, including tiling, fusion, scheduling, pipelining or autotuning, is a plus. Good understanding of GPU/NPU architecture, memory hierarchy and parallel programming. Experience with CUDA or other accelerator programming models is a plus. Experience optimizing AI workloads such as GEMM, Attention, MoE or other LLM operators is a plus. Experience developing compiler support for custom AI accelerators is a strong plus. Strong troubleshooting and performance analysis ability. BS/MS/PhD in CS/CE/EE/Math or related fields. Personal Skills Strong desire to deliver results and improve performance. Positive, “can do” attitude. Good communication and teamwork skills.