Cadence
Lead Application Engineer- 数字后端
岗位职责
Job Responsibility: To provide key technical support in digital IC design implementation, product demonstration, and sales presentations. To demonstrate strong ability and to be hands-on in RTL-to-GDSII design methodology, including both challenging low power and high performance designs. Have real design experience including synthesis, lowpower design, DFT, logic equivalence checking. Assist in technical evaluation and assessment. To play a leading role among other team members, while receive little instruction on routine and general assignments. Position
任职要求
A bachelor's degree is essential and 5+ years’ experience in IC design, electronic engineering or computer science applications. Ability to understand and articulate technical issues, (and knowledge of) design products and their applications. Have experience in synthesis flow and ability to understand the lowpower design with UPF, IEEE1801, CPF,etc. An MS degree and/or working experience in multi-nation IC design house/or familiar with Genus/Joules product is a plus Requires working knowledge of one or more programming languages, and effective communication and soft skills. Good problem solving skills Good communication in English and good work attitude.
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