平头哥-DFT设计/DFT CAD开发高级工程师/专家-北京

The candidate is expected to be responsible for following tasks: - Participate in complex Chip DFT/DFD feature and architecture definition - Implement DFT function including SCAN, Boundary SCAN, MBIST, Analog Macro test logic - Generate DFT related timing constraints and work for timing closure - Develop and verify high coverage and cost effective test patterns for the production test - Design, implement and verify other DFX (debug, characterization, yield etc) feature - Evaluate and establish the advanced DFT/DFD tools and flow as DFT CAD

7+ years for Bachelor or 5+ years for master degree experience in DFT design and verification, test pattern development KEY KNOWLEDGE, SKILLS AND ABILITIES REQUIRED - Good Knowledge of Scan/ATPG, MBIST and boundary scan and other DFT techniques - Good Knowledge of industry DFT tools like DFTMax, TetraMax ,TestKompress, FastScan, Tessent Mbist, SMS etc - Good knowledge of digital SoC/ASIC design, including STA, verification and RTL coding - Proficient in hardware description languages such as Verilog, System Verilog and VHDL - Good Knowledge of script language, such as Tcl, Python, Perl and DFT platform development skill is good plus for DFT CAD function - Good English hearing, speaking, reading and writing capabilities - Strong commitment to schedule and work quality, good team player