Staff EDA/CAD Engineer

• Own end-to-end management of mainstream EDA tool suites from Synopsys, Cadence, Siemens EDA (Mentor) etc., covering version evaluation, benchmarking,

, company-wide deployment and upgrade.

• Administer and optimize EDA license management systems (e.g., FlexNet, LM-X), including allocation, scheduling, usage monitoring and compliance control, to maximize resource utilization and cost efficiency.

• Act as primary technical contact for EDA vendor support, escalate and resolve complex tool issues, drive tool enhancement requests matching internal design team requirements.

• Explore and deploy AI/ML infrastructure within secure R&D environment, including server configuration and on-premises large model deployment, to enable AI-augmented design workflows.

• Cooperate with design, verification and backend teams to resolve tool/flow issues.

• Manage data security for all assets and workflows related to the chip design team.

Qualifications

• Bachelor’s degree or above in Electronic Engineering, Computer Science, Microelectronics or related technical fields.

• 5+ years of hands-on CAD/EDA experience in large-scale IC design companies or EDA tool vendors.

• Proficiency in Linux/Unix, with experience managing large-scale server clusters and tuning core services (NFS, LDAP, SSH, remote desktop).

• Master at least two scripting languages: Python, Tcl, Perl, Bash/Shell, or SKILL.

• Working knowledge of major EDA tool suites from Synopsys, Cadence and Siemens EDA.

• Familiarity with EDA license management principles and tools (FlexNet, LM-X).

• Strong troubleshooting and cross-team communication skills, fluent written and spoken English.

• Hands-on experience with HPC workload schedulers (LSF/Slurm), cluster performance tuning, NUMA architecture and high-speed storage systems.

• Prior experience deploying AI/ML infrastructure or implementing AI-enabled design automation workflows is a strong plus