Junior/Senior/Staff Multimedia(Video codec & Display) IP Design Engineer

-Deeply join video IP or Display IP spec and Video IP or Display IP architecture design; -Develop challenging modules including module spec, macro architecture, RTL coding, C coding, simulation, synthesis and timing analysis and fixing; - IP level or IP block level RTL design, initial verification, integration/implementation; -Cooperate with Algorithm engineers to optimize the performance of hardware modules and area; -Cooperate with verification engineers to debug different hardware issues; -Help/guild junior engineers to solve technical issues; -Support customers regarding Video IP hardware integration and application.

-Bachelor degree or above in EE; - 2+years of work experience in related areas; -Good knowledge of some of the following: H.264, H.265, VVC, AV1, VP9, MPEG, JPEG, AVS, AVS+ decoder & encoder and so on,Or display related knowledge such as post processing, color space conversion etc. -Skilled in the field of digital circuit design, whole digital design flow and EDA tools; -Skilled in some of the following : RTL coding, C coding, Catapult C coding, simulation, synthesis/DFT/STA. Knowledge about catapult C design flow is a plus; -Key member in at least one mature silicon proven video IP; -Good Mandarin and English communication skills; -Good communication skill and team work.